DocumentCode :
1948663
Title :
On the selection of on-chip inductors for the optimal VCO design
Author :
Zhan, Yong ; Harjani, Ramesh ; Sapatnekar, Sachin S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
fYear :
2004
fDate :
3-6 Oct. 2004
Firstpage :
277
Lastpage :
280
Abstract :
The selection of on-chip inductors is crucial to the design of low phase noise voltage controlled oscillators (VCOs). In this paper, we study the effect of substrate on the inductor selection criterion for the VCO circuit and resolve the long lasting argument among circuit designers about whether large or small inductors should be used to reduce the phase noise of VCOs. Several substrate types including CMOS, SOI, and substrates with patterned ground shields (PGSs) are compared, and we demonstrate that the substrate resistivity plays a key role in determining the selection criterion of the optimal on-chip inductors for VCO design.
Keywords :
CMOS integrated circuits; circuit optimisation; electrical resistivity; inductors; integrated circuit design; phase noise; silicon-on-insulator; voltage-controlled oscillators; CMOS; SOI; VCO design optimization; low phase noise VCO; on-chip inductor selection; patterned ground shield substrates; substrate effects; substrate resistivity; CMOS technology; Circuits; Conductivity; Inductance; Inductors; Network-on-a-chip; Phase noise; Spirals; Substrates; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004
Print_ISBN :
0-7803-8495-4
Type :
conf
DOI :
10.1109/CICC.2004.1358797
Filename :
1358797
Link To Document :
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