Biologically Inspired Hardware Implementation of Neural Networks with Programmable Conductance

This paper describes a way of implementing neural networks in biologically inspired hardware, based on electronically programmable conductance. The theoretical model of electronic implementation is analyzed and verified by the measurement of CMOS test device, SPICE and MATLAB simulation. A new analog multiplier is presented to enforce previous elements of implementing spike-based neural networks and Hodgkin-Huxley dynamic based neuron. The proposed analog multiplier is implemented by a parallel connection of two conductance-based synapse circuits, and its power consumption is 250frac14W with the simulated accuracy of 0.1%. The hardware implementation based on programmable conductance exhibits the low power consumption, biological plausibility, flexibility to various applications of asynchronous integration-and-firing, neural oscillator, and vision processing.