DocumentCode :
1948741
Title :
A framework for Open Tiled Manycore System-On-Chip
Author :
Wallentowitz, Stefan ; Lankes, Andreas ; Zaib, Aurang ; Wild, Thomas ; Herkersdorf, Andreas
Author_Institution :
Inst. for Integrated Syst., Tech. Univ. Munchen, München, Germany
fYear :
2012
fDate :
29-31 Aug. 2012
Firstpage :
535
Lastpage :
538
Abstract :
Tiled manycore architectures have become dominant for the integration of tens or even a hundred processor cores on a chip. While commercial products are increasingly available, research on the hardware of such platforms and especially prototyping often rely on building such a platform from scratch or is bound to abstract simulation. In this paper we present the Open Tiled Manycore System-on-Chip (Op-TiMSoC) which is a library-based tool flow that helps generating a tiled manycore platform based on a library of open standard components. OpTiMSoC allows for research and prototyping of both shared memory and distributed memory platforms. It includes LISNoC which is a flexible NoC implementation. An OpTiMSoC system can easily be generated based on the publicly available repository and prototyped on an FPGA. As exemplary targets we evaluated the usage of different FPGA boards and an emulation platform.
Keywords :
field programmable gate arrays; system-on-chip; FPGA boards; LISNoC; OpTiMSoC system; distributed memory platforms; field programmable gate arrays; flexible NoC implementation; library-based tool flow; open tiled manycore system-on-chip; processor cores; publicly available repository; shared memory platforms; Computer architecture; Field programmable gate arrays; IP networks; Layout; Libraries; System-on-a-chip; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on
Conference_Location :
Oslo
Print_ISBN :
978-1-4673-2257-7
Electronic_ISBN :
978-1-4673-2255-3
Type :
conf
DOI :
10.1109/FPL.2012.6339273
Filename :
6339273
Link To Document :
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