Enhanced analytic noise model for RF CMOS design

In this paper we develop a simple physics based noise model for short channel RF CMOS devices that is targeted towards analytic hand calculations but is easily incorporated into a circuit simulator. Classical CMOS transistor noise theory set forth by A. Van der Zeil (Proc. IRE, vol. 50, pp. 1808-1812, 1962) is combined with more recent noise studies. A novel de-embedding technique is used to extract experimental noise parameter results that confirm the model´s accuracy from 2-20 GHz for 0.18 μ length devices in the TSMC CMOS process. While some authors have assumed a fixed excess noise factor (γ) for predicting RF noise at a particular channel length, we show here that γ is sensitive to both device bias and process parameters and cannot be assumed constant for fixed channel length.