Title :
A CMOS direct-conversion transceiver for IEEE 802.11a/b/g WLANs
Author :
Zhang, Pengfei ; Der, Lawrence ; Guo, Dawei ; Sever, Isaac ; Bourdi, T. ; Lam, Chris ; Zolfaghari, Alireza ; Chen, Jess ; Gambetta, Douglas ; Cheng, Baohong ; Gower, Sujatha ; Hart, Siegfi-ied ; Huynh, Lam ; Nguyen, Thai ; Razavi, Behzad
Author_Institution :
RF Micro Devices, San Jose, CA, USA
Abstract :
This paper presents a single chip dual-band transceiver, fully compliant with the IEEE 802.11 a/b/g standards. Operating in the frequency ranges of 2.412-2.484 GHz and 4.92-5.805 GHz (including the Japanese band), the fractional-N PLL based frequency synthesizer achieves an integrated (10 kHz-10 MHz) phase noise of 0.54°/1.1° for 2/5-GHz band. The transmitter error-vector-magnitude (EVM) is -36/-33 dB with an output power level higher than -3/-5 dBm and the receiver sensitivity is better than -70 dBm for 2/5-GHz band for 64QAM at 54 Mb/s.
Keywords :
CMOS integrated circuits; field effect MMIC; frequency synthesizers; phase locked loops; phase noise; quadrature amplitude modulation; transceivers; wireless LAN; 0.18 micron; 10 kHz to 10 MHz; 2.412 to 2.484 GHz; 4.92 to 5.805 GHz; 54 Mbit/s; 64QAM; CMOS transceiver; EVM; IEEE 802.11a/b/g; WLAN; direct-conversion transceiver; fractional-N PLL based frequency synthesizer; phase noise; single chip dual-band transceiver; transmitter error-vector-magnitude; Baseband; Costs; Digital filters; Dissolved gas analysis; Dual band; Frequency synthesizers; Radio frequency; Radiofrequency amplifiers; Transceivers; Wireless LAN;
Conference_Titel :
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004
Print_ISBN :
0-7803-8495-4
DOI :
10.1109/CICC.2004.1358835
