Title :
Sequential synthesizable embedded programmable logic cores for system-on-chip
Author :
Yan, Andy ; Wilton, Steven J E
Author_Institution :
Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, Canada
Abstract :
Previous work has suggested that "soft" synthesizable programmable logic cores can efficiently provide small amounts of post-fabrication flexibility to integrated circuits. Previous architectures restrict the circuitry assigned to the core to be combinational. We present two methods to enhance these architectures to support sequential logic. We apply these methods to a previously developed fabric, and optimize and compare them. We also describe a proof-of-concept chip employing one of our techniques.
Keywords :
circuit optimisation; embedded systems; integrated circuit design; integrated circuit testing; logic design; programmable logic devices; sequential circuits; system-on-chip; circuitry architectures; combinational architectures; post-fabrication integrated circuit flexibility; proof-of-concept chip; sequential logic; sequential synthesizable embedded programmable logic cores; soft synthesizable programmable logic cores; system-on-chip; Computer architecture; Fabrication; Fabrics; Integrated circuit synthesis; Logic circuits; Logic design; Logic devices; Programmable logic arrays; Programmable logic devices; System-on-a-chip;
Conference_Titel :
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004
Print_ISBN :
0-7803-8495-4
DOI :
10.1109/CICC.2004.1358844
