DocumentCode :
1950003
Title :
Novel large area joining technique for improved power device performance
Author :
Schwarzbauer, H. ; Kuhnert, R.
Author_Institution :
Siemens AG, Munchen, West Germany
fYear :
1989
fDate :
1-5 Oct. 1989
Firstpage :
1348
Abstract :
Conventional techniques for joining a silicon wafer to suitable substrates do not satisfy the demands of future power devices. Therefore, a low-temperature joining technique based on the principle of diffusion welding has been developed. The surfaces to be joined are metallized with Ag or Au, and the molybdenum substrate is coated with a thin layer of silver flakes. The parts to be joined are then sintered together at about 240 degrees C and a pressure of approximately 40 N/mm/sup 2/ within a few minutes. The joining technique does not affect the silicon wafer and accordingly is compatible with conventional power device and IC fabrication techniques. Both sides of the wafer can be joined with substrates even if IC structures are present. This possibility allows an increased surge current. Numerical calculations for different wafer thicknesses have been performed and compared with results on test devices. The technical usefulness of this approach has been proved by additional tests such as thermal cycling.<>
Keywords :
integrated circuit manufacture; joining processes; power integrated circuits; 240 degC; Ag; Au; IC fabrication; Mo; Si wafer; diffusion welding; low-temperature joining technique; metallisation; power device performance; sintering; Alloying; Powders; Rough surfaces; Silicon; Silver; Surface roughness; Surface topography; Temperature; Thermal conductivity; Welding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industry Applications Society Annual Meeting, 1989., Conference Record of the 1989 IEEE
Conference_Location :
San Diego, CA, USA
Type :
conf
DOI :
10.1109/IAS.1989.96818
Filename :
96818
Link To Document :
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