Preliminary design of the pulse generator for the CLIC DR extraction system

The Compact Linear Collider (CLIC) study is exploring the scheme for an electron-positron collider with high luminosity (10³⁴-10³⁵ cm^-2s^-1) and a nominal centre-of-mass energy of 3 TeV: CLIC would complement LHC physics in the multi-TeV range. The CLIC design relies on the presence of Pre-Damping Rings (PDR) and Damping Rings (DR) to achieve the very low emittance, through synchrotron radiation, needed for the luminosity requirements of CLIC. To limit the beam emittance blowup due to oscillations, the pulse power modulators for the DR kickers must provide extremely flat, high-voltage, pulses: specifications call for a 160 ns duration flattop of 12.5 kV, 250 A, with a combined ripple and droop of not more than ±0.02%. In order to meet these demanding specifications, a combination of broadband impedance matching, optimized electrical layout and advanced control techniques is required. A solid-state modulator, the inductive adder, is the most promising approach to meeting the specifications; this topology allows the use of both digital and analogue modulation. To effectively use modulation to achieve such low ripple and droop requires an in-depth knowledge of the behaviour of the solid-state switching components and their gate drivers, as well as a thorough understanding of the overall circuit dynamics. Hence, circuit simulation tools have been employed to study the proposed inductive adder and various control schemes. This paper describes the initial design of the inductive adder and the use of active-filtering control algorithms for achieving the required pulse waveform.