DocumentCode
1950877
Title
Mechanical lapping of ultra-thin wafers for 3D integration
Author
Pinel, S. ; Tasselli, Josiane ; Bailbé, J.P. ; Marty, A. ; Puech, P. ; Estéve, D.
Author_Institution
Lab. d´´Analyse et d´´Archit. des Syst., CNRS, Toulouse, France
Volume
2
fYear
2000
fDate
2000
Firstpage
443
Abstract
This paper presents a new technique for thinning down up to 10 μm and handling various semiconductor devices, and transferring them onto host substrates. An optimized mechanical lapping is used to remove the wafer
Keywords
multichip modules; packaging; semiconductor technology; substrates; surface treatment; 10 micron; 3D integration; MCM structures; Si; host substrates; mechanical lapping; optimized mechanical lapping; semiconductor device handling; semiconductor device transfer; ultra-thin wafers; wafer removal; Fabrication; Lapping; MOSFETs; Optimization methods; Packaging; Powders; Semiconductor materials; Silicon; Substrates; Wet etching;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2000. Proceedings. 2000 22nd International Conference on
Conference_Location
Nis
Print_ISBN
0-7803-5235-1
Type
conf
DOI
10.1109/ICMEL.2000.838728
Filename
838728
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