• DocumentCode
    1951313
  • Title

    GeminiII: a second generation layout validation program

  • Author

    Ebeling, C.

  • Author_Institution
    Dept. of Comput. Sci., Washington Univ., Seattle, WA, USA
  • fYear
    1988
  • fDate
    7-10 Nov. 1988
  • Firstpage
    322
  • Lastpage
    325
  • Abstract
    Gemini is a program that is widely used to compare circuit layout against a specification. Extensions to Gemini that make it faster, enable it to isolate errors better, and extend its domain of application, are described. These improvements have been achieved by changes to the labeling algorithm, extensions to the local matching algorithm, better handling of symmetrical circuits, and the accommodation of series-connected transistors. GeminiII´s algorithm is separated into global labeling and local matching phases. GeminiII dynamically switches between the two, depending on the amount of local structure contained in the circuit, taking advantage of the speed of the local matching algorithm when possible and relying on the power of the more general algorithm when the simple algorithm fails.<>
  • Keywords
    circuit layout CAD; software packages; GeminiII; circuit layout comparison; error isolation; global labeling phase; labeling algorithm; local matching algorithm; local matching phases; local structure; second generation layout validation program; series-connected transistors; symmetrical circuits; Circuit simulation; Computer errors; Computer science; Geometry; Labeling; Microprocessors; Partitioning algorithms; Switches; Switching circuits; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on
  • Conference_Location
    Santa Clara, CA, USA
  • Print_ISBN
    0-8186-0869-2
  • Type

    conf

  • DOI
    10.1109/ICCAD.1988.122520
  • Filename
    122520