A new model for thin oxide degradation from wafer charging in plasma etching

Author

Sychyi Fang ; Murakawa, S. ; McVittie, J.P.

Author_Institution

Center for Integrated Syst., Stanford Univ., CA, USA

fYear

1992

fDate

13-16 Dec. 1992

Firstpage

61

Lastpage

64

Abstract

Plasma nonuniformity can lead to surface charging and damaging currents through thin oxides. In poly-Si etching, surface currents across the wafer prevent damage until just before endpoint when current collected in halo regions around the mask can lead to gate charging and excessive tunneling current through the oxide. During overetching, additional damage is minimal because of the small collection area. This model is supported by plasma measurements, SPICE simulations, and etching damage results.<>

Keywords

dielectric thin films; elemental semiconductors; semiconductor process modelling; silicon; sputter etching; static electrification; tunnelling; Si; gate charging; halo regions; model; overetching; plasma etching; poly-Si etching; polysilicon etching; surface charging; thin oxide degradation; tunneling current; wafer charging; Dielectric films; Semiconductor process modeling; Silicon; Sputter etching; Surface charging; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-0817-4

Type

conf

DOI

10.1109/IEDM.1992.307309

Filename

307309