• DocumentCode
    1951905
  • Title

    High-voltage accumulation-mode lateral RESURF GaN MOSFETs on SiC substrate

  • Author

    Matocha, K. ; Chow, T.P. ; Gutmann, R.J.

  • Author_Institution
    Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY, USA
  • fYear
    2003
  • fDate
    14-17 April 2003
  • Firstpage
    54
  • Lastpage
    57
  • Abstract
    Lateral, accumulation-mode gallium nitride (GaN) MOSFETs were fabricated on a silicon-doped GaN epilayer on a AlGaN isolation layer on a conducting 6H-SiC substrate. The polysilicon gate was formed over a 100 nm silicon dioxide gate dielectric deposited by low-pressure chemical vapor deposition at 900°C. The accumulation-layer field-effect mobility is measured to be 110 cm2/V-s. GaN MOSFETS with a 9 μm RESURF length were characterized with an on-resistance of 140 mΩ-cm2 at VGS=15 Volts and breakdown voltage ≤180 Volts attributed to tunneling through the AlGaN isolation layer.
  • Keywords
    III-V semiconductors; MOSFET; aluminium compounds; elemental semiconductors; gallium compounds; isolation technology; semiconductor device manufacture; silicon; silicon compounds; 100 nm; 15 V; 6H-SiC substrate; 900 C; AlGaN; GaN; SiO2; accumulation-layer field-effect mobility; accumulation-mode MOSFET; breakdown voltage; gate dielectric; isolation layer; lateral RESURF MOSFET; low-pressure chemical vapor deposition; metal oxide semiconductor field effect transistor; polysilicon gate; reduced surface field; Aluminum gallium nitride; Chemical vapor deposition; Dielectric measurements; Dielectric substrates; Gallium nitride; III-V semiconductor materials; MOSFETs; Silicon carbide; Silicon compounds; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Semiconductor Devices and ICs, 2003. Proceedings. ISPSD '03. 2003 IEEE 15th International Symposium on
  • Print_ISBN
    0-7803-7876-8
  • Type

    conf

  • DOI
    10.1109/ISPSD.2003.1225229
  • Filename
    1225229