Design considerations on CMOS bulk-driven differential input stages

Author

Carrillo, Juan M. ; Duque-Carrillo, J. Francisco ; Torelli, Guido

Author_Institution

Dipt. de Ing. Electr., Electron. y Autom., Univ. de Extremadura, Badajoz, Spain

fYear

2012

fDate

19-21 Sept. 2012

Firstpage

85

Lastpage

88

Abstract

Design considerations regarding the DC behaviour of CMOS bulk-driven differential input stages are addressed in this paper. Unlike in conventional gate-driven circuits, the input terminal of a bulk-driven transistor consists of a pn junction, whose real behaviour is critical to determine the input performance of the overall circuit. In this work, the simulated and experimental performance of a bulk-driven differential pair are illustrated and compared in order to draw design hints. The conclusions drawn are applied to the design of a low-voltage bulk-driven voltage-to-current converter in 0.35-μm standard CMOS technology.

Keywords

CMOS analogue integrated circuits; convertors; integrated circuit design; low-power electronics; CMOS bulk-driven differential input stages; DC behaviour; bulk-driven differential pair; bulk-driven transistor; conventional gate-driven circuits; low-voltage bulk-driven voltage-to-current converter design; pn junction; size 0.35 mum; standard CMOS technology; CMOS integrated circuits; Current measurement; Junctions; Logic gates; MOSFETs; Threshold voltage; Transconductance; CMOS analog integrated circuits; bulk-driven MOS transistors; low-voltage; voltage-to-current converter;

fLanguage

English

Publisher

ieee

Conference_Titel

Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012 International Conference on

Conference_Location

Seville

Print_ISBN

978-1-4673-0685-0

Type

conf

DOI

10.1109/SMACD.2012.6339423

Filename

6339423