• DocumentCode
    1952136
  • Title

    Advanced partial run-time reconfiguration on Spartan-6 FPGAs

  • Author

    Koch, Dirk ; Beckhoff, Christian ; Tørrison, J.

  • Author_Institution
    Dept. of Inf., Univ. of Oslo, Oslo, Norway
  • fYear
    2010
  • fDate
    8-10 Dec. 2010
  • Firstpage
    361
  • Lastpage
    364
  • Abstract
    In this paper, we demonstrate systems based on Spartan-6 series FPGAs that provide full support for active partial run-time reconfiguration. We will summarize design factors for successfully applying run-time reconfiguration, reveal details on partial reconfiguration on Spartan-6 FPGAs, and introduce our easy to use design flow. In this flow, a module can multiple times be instantiated or even migrated to different systems without the need to physically reimplement such a module. The demo systems can host manifold different partial modules that each are capable to manipulate a video stream.
  • Keywords
    field programmable gate arrays; logic design; Spartan-6 FPGA; advanced partial run-time reconfiguration; demo systems; design flow; Clocks; Fabrics; Field programmable gate arrays; Random access memory; Routing; Table lookup; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Technology (FPT), 2010 International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4244-8980-0
  • Type

    conf

  • DOI
    10.1109/FPT.2010.5681426
  • Filename
    5681426