Title :
A debugging method for repairing post-silicon bugs of high performance processors in the fields
Author :
Alizadeh, Bijan ; Fujita, Masahiro
Author_Institution :
VLSI Design & Educ. Center (VDEC), Univ. of Tokyo, Tokyo, Japan
Abstract :
Due to the highly complicated control structures of modern processors, some of the logical bugs may escape from the verification process and remain into the silicon. This paper proposes verification/debugging/field-rectification methods based on formal verification techniques that enables designers not only to automatically debug high performance processors by concentrating on word-level reasoning but also to introduce key control points with programmability in the silicon so that post-silicon bugs can be rectified in the field. The results show that by considering those state variables that fix wide ranges of pre-silicon bugs as key control points for programmability in the fields, inserted LUTs can be reduced due to the fact that only one LUT can be shared to correct all relevant bugs.
Keywords :
computer debugging; elemental semiconductors; formal verification; integrated circuit design; microprocessor chips; silicon; table lookup; LUT; Si; debugging method; field-rectification methods; formal verification techniques; high performance processors; key control points; post-silicon bug; verification process; word-level reasoning; Computer bugs; Debugging; Program processors; Registers; Silicon; Table lookup; Timing;
Conference_Titel :
Field-Programmable Technology (FPT), 2010 International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-8980-0
DOI :
10.1109/FPT.2010.5681434