Title :
0.25 mu m gate length N-InGaP/InGaAs/GaAs HEMT DCFL circuit with lower power dissipation than high-speed Si CMOS circuits
Author :
Kuroda, S. ; Suehiro, H. ; Miyata, T. ; Asai, S. ; Hanyu, I. ; Shima, M. ; Hara, N. ; Takikawa, M.
Author_Institution :
Fujitsu Labs. Ltd., Atsugi, Japan
Abstract :
The 0.25- mu m-gate N-InGaP/InGaAs/GaAs HEMT significantly improves DCFL circuit power dissipation to 70 mu W/gate and reduces the supply voltage to 0.6 V with a sufficient noise margin of 0.15 V. The development of the short gate HEMT with no short channel effects is the key to achieving the low power dissipation required for VLSI fabrication. The results are significant to future HEMT VLSI applications.<>
Keywords :
III-V semiconductors; VLSI; direct coupled FET logic; field effect integrated circuits; gallium arsenide; gallium compounds; indium compounds; integrated logic circuits; 0.25 micron; 0.6 V; HEMT DCFL circuit; InGaP-InGaAs-GaAs; VLSI fabrication; noise margin; power dissipation; short gate HEMT; supply voltage; FET integrated circuits; Gallium compounds; Indium compounds; Very-large-scale integration;
Conference_Titel :
Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1992.307370
