Title :
An efficient rule-based OPC approach using a DRC tool for 0.18 μm ASIC
Author :
Park, Ji-Soong ; Park, Chul-Hong ; Rhie, Sang-Uhk ; Kim, Yoo-Hyon ; Yoo, Moon-Hyun ; Kong, Jeong-Taek ; Kim, Hyung-Woo ; Yoo, Sun-Il
Author_Institution :
Semicond. R&D Center, CAE, South Korea
Abstract :
The increasing complexity and data volume of VLSI designs demand an efficient optical proximity correction (OPC) technique. In this paper, we address the issues related to the gate bridge, which is serious in sub-quarter micron technology, and the wide range of contact CD (Critical Dimension) variation. We present the efficient gate CD control method by introducing the critical area correction. In addition, the contact CD variation is reduced under the target CD range due to the combination of the contact biasing and the process calibration. The correction time and output data volume are drastically reduced by the hierarchical data manipulation using a DRC (Design Rule Check) tool, which basically exploits the characteristics of the design layers in ASICs. The newly proposed incremental on-line violation filtering method also reduces the correction cycle time significantly
Keywords :
VLSI; application specific integrated circuits; calibration; integrated circuit measurement; integrated circuit yield; photolithography; proximity effect (lithography); 0.18 micron; ASIC; DRC tool; VLSI designs; contact biasing; contact critical dimension variation; correction cycle time; correction time; critical area correction; data volume; design rule check; gate bridge; hierarchical data manipulation; incremental on-line violation filtering method; optical proximity correction; output data volume; process calibration; rule-based OPC approach; Application specific integrated circuits; Image motion analysis;
Conference_Titel :
Quality Electronic Design, 2000. ISQED 2000. Proceedings. IEEE 2000 First International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
0-7695-0525-2
DOI :
10.1109/ISQED.2000.838858
