DocumentCode :
1952753
Title :
A programmable CMOS RF frequency synthesizer for multi-standard wireless applications
Author :
Majek, C. ; Deltimple, N. ; Lapuyade, H. ; Bégueret, J.B. ; Kerhervé, E. ; Deval, Y.
Author_Institution :
IXL Lab., Bordeaux I Univ., Talence, France
fYear :
2004
fDate :
20-23 June 2004
Firstpage :
289
Lastpage :
292
Abstract :
This paper deals with a new frequency synthesizer dedicated to multi-standard wireless applications. It converts a 50 MHz wave clock into two outputs in quadrature phase. It takes advantage of the DLL topology in terms of jitter and phase noise and has no external element. Simulations of the structure designed with a 130 nm SOI CMOS technology confirming the performance of the system are also presented.
Keywords :
CMOS integrated circuits; circuit simulation; delay lock loops; elemental semiconductors; frequency synthesizers; integrated circuit design; integrated circuit noise; jitter; network topology; phase noise; programmable circuits; radiocommunication; radiofrequency integrated circuits; silicon-on-insulator; 130 nm; 50 MHz; DLL topology; SOI CMOS technology; Si; circuit simulation; integrated circuit design; jitter noise; multistandard wireless applications; phase noise; programmable CMOS RF frequency synthesizer; CMOS technology; Circuit simulation; Circuit topology; Clocks; Counting circuits; Frequency synthesizers; Jitter; Phase noise; Radio frequency; Ring oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. NEWCAS 2004. The 2nd Annual IEEE Northeast Workshop on
Print_ISBN :
0-7803-8322-2
Type :
conf
DOI :
10.1109/NEWCAS.2004.1359088
Filename :
1359088
Link To Document :
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