GE3: A single FPGA client-server architecture for Golomb Ruler derivation

Optimal Golomb Rulers (OGR) are a discrete mathematics problem for which there is no known closed form solution. This problem is so computationally intensive that it is considered a “grand challenge problem”. Since the early 1990´s FPGA-based OGR engines have been designed, with excellent performance vs. general-purpose computing. This paper presents a new, single FPGA clientserver architecture for OGR derivation. The new client architecture supports parallel evaluation of multiple hypotheses (up to 16), each implemented as a shift operation, and one server which can support many clients. The new architecture has a measured speedup of 8 against an Intel Core 2 Duo processor for a single client supporting up to eight “shifts” and running on a Virtex 2P FPGA, and a post place-and-route simulation-derived speedup of 160 with four clients on a Virtex 5 FPGA, each supporting up to sixteen “shifts”. The new architecture has been fully implemented and runs on actual hardware, whereas simulations have been used to project performance on FPGA´s which were not available for experimentation.