• DocumentCode
    1952883
  • Title

    SOI high voltage power FET with an internal voltage (current) sensing terminal

  • Author

    Petruzzello, J. ; Letavic, T. ; Dufort, B.

  • Author_Institution
    Philips Res. USA, Briarcliff Manor, NY, USA
  • fYear
    2003
  • fDate
    14-17 April 2003
  • Firstpage
    224
  • Lastpage
    227
  • Abstract
    This report describes the novel use of the field-plate in a SOI HV power FET as a VDS sensing terminal. The sensing terminal can be used in over-voltage protection schemes without the need of an external clamping circuit. We have shown that this scheme can be employed without any degradation of the power FET performance.
  • Keywords
    high-voltage techniques; overvoltage protection; power field effect transistors; sensors; silicon-on-insulator; SOI high voltage power FET; internal voltage sensing terminal; over-voltage protection scheme; power FET performance; Breakdown voltage; Capacitors; Clamps; Degradation; Diodes; FETs; Protection; Pulse circuits; Space vector pulse width modulation; Switched-mode power supply;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Semiconductor Devices and ICs, 2003. Proceedings. ISPSD '03. 2003 IEEE 15th International Symposium on
  • Print_ISBN
    0-7803-7876-8
  • Type

    conf

  • DOI
    10.1109/ISPSD.2003.1225269
  • Filename
    1225269