Title :
What can replace BiCMOS at lower supply voltage regime?
Author :
Nagano, T. ; Shukuri, S. ; Hiraki, M. ; Minami, M. ; Watanabe, A. ; Nishida, T.
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
Abstract :
This paper proposes a design concept for deep submicron BiCMOS technologies operating faster than CMOS under low power supply by eliminating negative effects caused by the built-in voltage V/sub BE/. This is realized by a circuit configuration that temporary saturates and pre-charges the base-emitter junction, and by a self-aligned contact scheme for CMOS and bipolar transistors and a utilization of p-n-p transistors. Excellent circuit performance is demonstrated at supply voltages ranging from 3.3 to 1.5 volts.<>
Keywords :
BiCMOS integrated circuits; integrated circuit technology; 1.5 to 3.3 V; base-emitter junction precharging; built-in voltage; circuit configuration; circuit performance; deep submicron BiCMOS technologies; low power supply; p-n-p transistors; self-aligned contact scheme; BiCMOS integrated circuits; Integrated circuit fabrication;
Conference_Titel :
Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1992.307385
