DocumentCode
1952927
Title
Sub-20 psec ECL circuits with 50 GHz fmax self-aligned SiGe HBTs
Author
Sato, F. ; Hashimoto, T. ; Tatsumi, T. ; Kitahata, H. ; Tashiro, T.
Author_Institution
ULSI Device Dev. Labs., NEC Corp., Sagamihara, Japan
fYear
1992
fDate
13-16 Dec. 1992
Firstpage
397
Lastpage
400
Abstract
This paper describes a high fmax self-aligned SiGe heterojunction bipolar transistor (HBT) technology which is based on the self-aligned selective epitaxial growth technology including Ge graded profile and link-base engineering using a BSG sidewall structure. The HBT has a Super Self-aligned Selectively grown SiGe Base (SSSB) structure. Base profile design and a 2-step annealing technique have realized a f/sub T/ of 51 GHz and low sheet resistance at the link-base region, and furthermore have accomplished fmax of as high as 50 GHz. ECL circuits of 19 psec gate delay have been achieved by using this SiGe HBT technology.<>
Keywords
Ge-Si alloys; annealing; bipolar integrated circuits; emitter-coupled logic; epitaxial growth; heterojunction bipolar transistors; integrated circuit technology; integrated logic circuits; semiconductor materials; 19 to 20 ps; 2-step annealing technique; 50 GHz; B2O3-SiO2; BSG; BSG sidewall structure; ECL circuits; Ge graded profile; SiGe; SiGe HBTs; base profile design; heterojunction bipolar transistor; link-base engineering; self-aligned selective epitaxial growth technology; super self-aligned selectively grown SiGe base; Annealing; Bipolar integrated circuits; Emitter coupled logic; Epitaxial growth; Germanium alloys; Heterojunction bipolar transistors; Integrated circuit fabrication; Semiconductor materials; Silicon alloys;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Print_ISBN
0-7803-0817-4
Type
conf
DOI
10.1109/IEDM.1992.307386
Filename
307386
Link To Document