DocumentCode :
1953117
Title :
Shunt-peaking of MCML gates using active inductors
Author :
Bui, Hung Tien ; Savaria, Yvon
Author_Institution :
Ecole Polytech. de Montreal, Que., Canada
fYear :
2004
fDate :
20-23 June 2004
Firstpage :
361
Lastpage :
364
Abstract :
This paper proposes the use of active inductors in shunt-peaking of MCML gates. Shunt-peaking typically uses spiral inductors to extend the bandwidth of integrated circuits. By using active inductors instead of spiral inductors, the required silicon area is greatly reduced and the design process is simplified. Several gates have been designed in 0.18 μm CMOS technology and simulation results show that active shunt-peaking improves the transition time of resistor-loaded MCML gates by over 15%.
Keywords :
CMOS logic circuits; current-mode circuits; current-mode logic; differentiating circuits; inductors; logic design; logic gates; resistors; 0.18 micron; CMOS technology; MOS CML gates; active inductors; active shunt peaking; integrated circuits; resistor loaded gates; spiral inductors; transition time; Active inductors; Bandwidth; CMOS logic circuits; CMOS technology; Circuit simulation; Electromagnetic modeling; Process design; Silicon; Spirals; Tail;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. NEWCAS 2004. The 2nd Annual IEEE Northeast Workshop on
Print_ISBN :
0-7803-8322-2
Type :
conf
DOI :
10.1109/NEWCAS.2004.1359107
Filename :
1359107
Link To Document :
بازگشت