DocumentCode :
1953368
Title :
Ultra low on-resistance Super 3D MOSFET
Author :
Yamaguchi, Hitoshi ; Suzuki, Naohiro ; Sakakibara, Jun
Author_Institution :
Res. Labs., Denso Corp., Aichi, Japan
fYear :
2003
fDate :
14-17 April 2003
Firstpage :
316
Lastpage :
319
Abstract :
For the purpose of reducing the power MOSFET on-resistance in the range of under 300V breakdown voltage, we have already proposed a new power MOSFET hat we call the Super 3D MOSFET. At 70V breakdown voltage, the simulated total specific on-resistance was 19 mΩ-mm2 and below the Ron Si limit. In this work, we present the structural design for source and drain resistance in order to utilize the widened channel and drift path effectively. And also we mention the manufacturing influence of the in-depth distribution such as gate oxide thickness and doping concentration of drift layer to reduce the specific on-resistance. Furthermore, we will present the experimental results concerning the on-resistance reduction by deepening the structure.
Keywords :
power MOSFET; 300 V; 70 V; doping concentration; drain resistance; drift layer; drift path; gate oxide thickness; in-depth distribution; on-resistance reduction; power MOSFET; source resistance; structural design; super 3D MOSFET; ultra low on-resistance; widened channel; Contact resistance; Engineering profession; Insulated gate bipolar transistors; Laboratories; MOSFET circuits; Power MOSFET; Power semiconductor devices; Semiconductor device doping; Semiconductor device manufacture; Surface resistance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 2003. Proceedings. ISPSD '03. 2003 IEEE 15th International Symposium on
Print_ISBN :
0-7803-7876-8
Type :
conf
DOI :
10.1109/ISPSD.2003.1225291
Filename :
1225291
Link To Document :
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