HEMT short-gate noise modelling and parametric analysis of NF performance limits

Author

Bonani, F. ; Ghione, G. ; Naldi, C.U. ; Schnell, R.D. ; Siweris, H.J.

Author_Institution

Dipartimento di Elettronica, Politecnico di Torino, Italy

fYear

1992

fDate

13-16 Dec. 1992

Firstpage

581

Lastpage

584

Abstract

The paper describes an analytical, CAD-oriented quasi-2D noise model for AlGaAs-GaAs HEMTs, based on an improved version of the Ando and Itoh approach (see IEEE Trans. on Electron Devices, vol. ED-37, no. 1, p. 67-78, 1990). The model was validated through comparison with DC, AC and noise measurements carried out on both standard 0.5 mu m (HEMT30) and advanced 0.25 mu m (HEMT40) SIEMENS HEMTs. On the basis of the SIEMENS HEMT structure, a scaling study was performed to extrapolate the performance limits of this technology with decreasing gate length in the range 0.5-0.1 mu m. The extension of the model to pseudomorphic and double-channel HEMT´s is in progress.<>

Keywords

III-V semiconductors; aluminium compounds; gallium arsenide; high electron mobility transistors; semiconductor device models; semiconductor device noise; 0.1 to 0.5 micron; AlGaAs-GaAs; CAD-oriented quasi-2D noise model; HEMT short-gate noise modelling; HEMT30; HEMT40; NF performance limits; SIEMENS HEMT; noise figure; parametric analysis; scaling study; Aluminum compounds; Gallium compounds; MODFETs; Semiconductor device modeling; Semiconductor device noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-0817-4

Type

conf

DOI

10.1109/IEDM.1992.307429

Filename

307429