Title :
Charge build-up and its reduction in plasma cleaning process
Author :
Arita, Kiyoshi ; Noda, Kazuhiro ; Asano, Tanemasa
Author_Institution :
Kyushu Matsushita Electr. Co. Ltd., Japan
Abstract :
Charge build-up in the plasma cleaning process has been investigated from the viewpoints of plasma uniformity, gas species and pressure, plasma exposure time, anode-cathode distance and substrate (circuit board) configuration. The spatial distribution of plasma parameters in plasma cleaning was diagnosed using a Langmuir probe. The charge build-up was evaluated using MNOS capacitors and MOS capacitors. Gases such as Ar, Ar-H2, Xe and O2 have been investigated. It has been found that the spatial distribution of plasma parameters is uniform, and that the charge build-up in plasma cleaning is negligibly small with regard to test chips placed without substrates. Use of substrates was found to increase the amount of charge build-up. Charge build-up was found to depend on the size, material and structure of the substrate. It was found that plasma cleaning with substrates with a conductive surface film such as a plated gold film resulted in considerable charge build-up. We found that use of an insulator mask or insulating die-bonding paste was very effective for charge build-up minimization
Keywords :
Langmuir probes; MOS capacitors; chip-on-board packaging; integrated circuit packaging; integrated circuit testing; metallisation; multichip modules; plasma chemistry; plasma density; plasma materials processing; plasma pressure; surface charging; surface cleaning; surface contamination; Ar; Ar plasma; Ar-H2; Ar-H2 plasma; Au; COB packaging; IC packaging; Langmuir probe; MCM; MNOS capacitors; MOS capacitors; O2; O2 plasma; Xe; Xe plasma; anode-cathode distance; charge build-up; charge build-up and its reduction; charge build-up minimization; conductive surface film; insulating die-bonding paste; insulator mask; plasma cleaning; plasma cleaning process; plasma exposure time; plasma gas species; plasma parameter spatial distribution; plasma pressure; plasma uniformity; plated gold film; substrate circuit board configuration; substrate materials; substrate size; substrate structure; test chips; Cleaning; Conductive films; Gases; Insulation; MOS capacitors; Plasma diagnostics; Plasma materials processing; Printed circuits; Probes; Substrates;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1998. IEMT-Europe 1998. Twenty-Second IEEE/CPMT International
Conference_Location :
Berlin
Print_ISBN :
0-7803-4520-7
DOI :
10.1109/IEMTE.1998.723065