Deep sub-micron static timing analysis in presence of crosstalk

Author

Tehrani, Peivand F. ; Chyou, Shang Woo ; Ekambaram, Uma

Author_Institution

Synopsys Inc., Thousand Oaks, CA, USA

fYear

2000

fDate

2000

Firstpage

505

Lastpage

512

Abstract

A complete and accurate method for static timing analysis of deep sub-micron devices in presence of crosstalk is introduced. This scheme provides an efficient platform for fast and accurate static timing verification of large scale transistor and cell level netlists, with coupled interconnects and high switching speeds. This paper presents the solution to the crosstalk problem implemented in the static timing tool PathMill as its crosstalk extension (CTX). A comparison of simulation results between this approach and SPICE is also provided

Keywords

VLSI; circuit analysis computing; crosstalk; digital integrated circuits; high-speed integrated circuits; timing; PathMill tool; coupled interconnects; crosstalk; deep submicron devices; high switching speeds; large scale cell level netlists; large scale transistor level netlists; static timing analysis; static timing verification; Circuit simulation; Clocks; Crosstalk; Delay estimation; Frequency; Integrated circuit interconnections; Large-scale systems; SPICE; Testing; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Quality Electronic Design, 2000. ISQED 2000. Proceedings. IEEE 2000 First International Symposium on

Conference_Location

San Jose, CA

Print_ISBN

0-7695-0525-2

Type

conf

DOI

10.1109/ISQED.2000.838937

Filename

838937