Hot-carrier effects in 0.1 mu m gate length CMOS devices

Hot-carrier effects in 0.1 mu m gate length CMOS devices have been investigated. The impact ionization rate alpha rapidly increases for gate lengths shorter than 0.2 mu m in both n- and p-channel devices at the same 1/(V/sub d/-V/sub dsat/). These results are considered to be due to the increase in the carrier energy in the pinch-off region caused by the increase of the channel electric field. Moreover, for shorter than 1 mu m gate length devices, the impact ionization rate does not increase, in spite of reducing the pinch-off region length by thinning the gate oxide. As a result, the usual lucky electron model, that is the universal relationship between ln( alpha ) and 1/(V/sub d/-V/sub dsat/) should be corrected in 0.1 mu m MOSFETs, by considering the enhanced carrier temperature. Moreover, we discuss device degradation caused by D.C. stress.<>