DocumentCode
1954610
Title
Distributed diagnostic simulation of stuck-at faults in sequential circuits
Author
Venkataraman, Srikanth ; Fuchs, W. Kent
Author_Institution
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
fYear
1997
fDate
4-7 Jan 1997
Firstpage
381
Lastpage
385
Abstract
This paper describes the parallelization of a diagnostic fault simulator for stuck-at faults in sequential circuits. The parallelization is performed by partitioning the diagnostic equivalence classes obtained by simulating the first few test vectors of the test set. The partitions are then simulated in parallel, independent of each other for the remaining vectors. Thus there is no communication overhead. Results on performance speedup and diagnostic resolution loss are provided for the ISCAS 89 benchmark circuits
Keywords
circuit analysis computing; fault diagnosis; integrated circuit testing; integrated logic circuits; logic testing; parallel algorithms; sequential circuits; distributed diagnostic simulation; parallelization; partitioning strategy; sequential circuits; stuck-at faults; Benchmark testing; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer simulation; Fault diagnosis; Performance loss; Sequential circuits; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1997. Proceedings., Tenth International Conference on
Conference_Location
Hyderabad
ISSN
1063-9667
Print_ISBN
0-8186-7755-4
Type
conf
DOI
10.1109/ICVD.1997.568157
Filename
568157
Link To Document