• DocumentCode
    1955093
  • Title

    Examining Important Corner Cases: Verification of Interacting Architectural Components in System Designs

  • Author

    Watanabe, Yosinori

  • Author_Institution
    Cadence Berkeley Labs., Berkeley, CA, USA
  • fYear
    2009
  • fDate
    1-3 July 2009
  • Firstpage
    19
  • Lastpage
    19
  • Abstract
    In embedded system design, design errors are often introduced at the interfaces between multiple architectural components. Systematic design methodology for verifying the interaction between the components is imperative for improving the design productivity. In practice, different kinds of interactions need to be examined, in terms of levels of abstraction and in terms of types of architectural components. In all the cases, the key aspect is to stress the interacting components in such a way that important corner cases can be effectively examined, but the models to be used and the issues to be addressed vary, depending upon the kinds of interactions to be verified. In this talk, we observe typical types of interactions one needs to examine in embedded system designs, and present issues and requirements that one needs to account for. We then show some approaches that can be used for the interaction verification, and discuss how the stated requirements are addressed with those approaches.
  • Keywords
    formal verification; software architecture; design productivity; embedded system design; interacting architectural component verification; systematic design methodology; Concurrent computing; Design methodology; Embedded system; Productivity; Stress;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application of Concurrency to System Design, 2009. ACSD '09. Ninth International Conference on
  • Conference_Location
    Augsburg
  • ISSN
    1550-4808
  • Print_ISBN
    978-0-7695-3697-2
  • Type

    conf

  • DOI
    10.1109/ACSD.2009.28
  • Filename
    5291077