Title :
Design Techniques for High-Speed Low-Power and High-Temperature Digital Cmos Circuits on Soi
Author :
Flandre, P. ; Jacquemin, C. ; Colinge, J.P.
Author_Institution :
Microelectronics Lab., Universite Catholique de Louvain, Belgium
Keywords :
CMOS digital integrated circuits; CMOS logic circuits; CMOS technology; Circuit simulation; Clocks; Delay; Integrated circuit interconnections; Parasitic capacitance; SPICE; Substrates;
Conference_Titel :
SOI Conference, 1992. IEEE International
Conference_Location :
Ponte Vedra Beach, FL
Print_ISBN :
0-7803-7439-8
DOI :
10.1109/SOI.1992.664841
