Title :
High transconductance 0.1 mu m pMOSFET
Author :
Taur, Y. ; Cohen, S. ; Wind, S. ; Lii, T. ; Hsu, C. ; Quinlan, D. ; Chang, C. ; Buchanan, D. ; Agnello, P. ; Mii, Y. ; Reeves, C. ; Acovic, A. ; Kesan, V.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
Very high transconductance 0.1 mu m surface-channel pMOSFET devices are fabricated with p/sup +/-poly gate on 35 AA-thick gate oxide. A 600AA-deep p/sup +/ source-drain extension is used with self-aligned TiSi/sub 2/ to achieve low device series resistance. The maximum saturation transconductances, 400 mS/mm at 300K and 500 mS/mm at 80K, are the highest reported to date for pMOSFET devices.<>
Keywords :
insulated gate field effect transistors; metallisation; semiconductor technology; 0.1 micron; 300 K; 80 K; device series resistance; gate oxide; p/sup +/ source-drain extension; p/sup +/-poly gate; saturation transconductances; self-aligned TiSi/sub 2/; surface-channel pMOSFET devices; transconductance; Insulated gate FETs; Metallization; Semiconductor device fabrication;
Conference_Titel :
Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1992.307502
