Simulation of GaAs MESFET process yield from RF large signal figures-of-merit

Author

Stoneking, D.E. ; Trew, R.J.

Author_Institution

Dept. of Electron. Comput. Eng., North Carolina State Univ., Raleigh, NC, USA

fYear

1989

fDate

22-25 Oct. 1989

Firstpage

289

Lastpage

292

Abstract

A simulator for calculating MESFET large-signal figures of merit and their sensitivities with respect to various device design, material, and operational parameters has been developed. User-defined large-signal figures-of-merit, such as the linear gain, the RF output power at various gain compression levels, and the maximum power-added efficiency, can be calculated over any range of process, material, parasitic, and bias parameters. This capability allows, for the first time, process yield under large-signal RF conditions to be investigated before fabrication. In this manner, computer-aided design centering for high process yield is made possible.<>

Keywords

III-V semiconductors; Schottky gate field effect transistors; circuit CAD; digital simulation; gallium arsenide; GaAs; MESFET process yield; RF output power; bias parameters; computer-aided design centering; gain compression levels; large-signal figures of merit; linear gain; operational parameters; parasitic parameters; power-added efficiency; Circuit simulation; Gain; Gallium arsenide; Implants; MESFETs; Power generation; RF signals; Radio frequency; Signal processing; Statistical distributions;

fLanguage

English

Publisher

ieee

Conference_Titel

Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1989. Technical Digest 1989., 11th Annual

Conference_Location

San Diego, CA, USA

Type

conf

DOI

10.1109/GAAS.1989.69345

Filename

69345