Title :
First order nonlinear device bypass in circuit simulation
Abstract :
The current bypass scheme used in SPICE produces inconsistent approximations to the function and derivative values needed by Newton iteration. A consistent first-order bypass approach based on the first-degree Taylor polynomial at the previous evaluation point is introduced. Test results show moderate reductions in the number of time points and Newton iterations during transient analyses, an increase in the percentage of devices that bypass, and a significant decrease in the average relative error of output waveforms. This last result suggests that comparable accuracy can be achieved with a considerably larger setting of the user-settable accuracy parameter, leading to a significant decrease in CPU time.<>
Keywords :
circuit analysis computing; digital simulation; errors; iterative methods; nonlinear network analysis; polynomials; transients; CPU time; Newton iteration; SPICE; average relative error; circuit simulation; derivative values; first-degree Taylor polynomial; first-order bypass approach; function values; nonlinear device; output waveforms; time point reduction; transient analyses; user-settable accuracy parameter; Central Processing Unit; Circuit simulation; Circuit testing; Computational modeling; Finite wordlength effects; Jacobian matrices; Polynomials; SPICE; Transient analysis; Voltage;
Conference_Titel :
Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-0869-2
DOI :
10.1109/ICCAD.1988.122543