Title :
Schedulability Analysis of MSC-based System Models
Author :
Ju, Lei ; Roychoudhury, Abhik ; Chakraborty, Samarjit
Author_Institution :
Dept. of Comput. Sci., Nat. Univ. of Singapore, Singapore
Abstract :
Message sequence charts (MSCs) are widely used for describing interaction scenarios between the components of a distributed system. Consequently, worst-case response time estimation and schedulability analysis of MSC-based specifications form natural building blocks for designing distributed real-time systems. However, currently there exists a large gap between the timing and quantitative performance analysis techniques that exist in the real-time systems literature, and the modeling/specification techniques that are advocated by the formal methods community. As a result, although a number of schedulability analysis techniques are known for a variety of task graph-based models, it is not clear if they can be used to effectively analyze standard specification formalisms such as MSCs. In this paper we make an attempt to bridge this gap by proposing a schedulability analysis technique for MSC-based system specifications. We show that compared to existing timing analysis techniques for distributed real-time systems, our proposed analysis gives tighter results, which immediately translate to better system design and improved resource dimensioning. We illustrate the details of our analysis using a setup from the automotive electronics domain, which consist of two real-life application programs (that are naturally modeled using MSCs) running on a platform consisting of multiple electronic control units (ECUs) connected via a FlexRay bus.
Keywords :
formal specification; scheduling; systems analysis; distributed real-time systems; formal methods; message sequence charts; modeling/specification techniques; performance analysis techniques; schedulability analysis; task graph-based models; timing analysis techniques; Application software; Automotive engineering; Communication system control; Computer science; Control systems; Delay; Processor scheduling; Real time systems; Timing; Upper bound; Message Sequence Charts / Graphs; Schedulability analysis;
Conference_Titel :
Real-Time and Embedded Technology and Applications Symposium, 2008. RTAS '08. IEEE
Conference_Location :
St. Louis, MO
Print_ISBN :
978-0-7695-3146-5
DOI :
10.1109/RTAS.2008.9