DocumentCode :
1956647
Title :
Comparison of tree and straight-line clocking for long systolic arrays
Author :
Dikaiakos, Marios D. ; Steiglitz, Kenneth
Author_Institution :
Dept. of Computer Sci., Princeton Univ., NJ, USA
fYear :
1991
fDate :
14-17 Apr 1991
Firstpage :
1177
Abstract :
Achieving efficient and reliable synchronization is a critical problem in building long systolic arrays. This problem is addressed in the context of synchronous systems by introducing probabilistic models for two alternative clock distribution schemes: tree and straight-line clocking. Analytic bounds are presented for the probability of failure, and an examination is made of the tradeoffs between reliability and throughput in both schemes. The basic conclusion is that as the one-dimensional systolic array gets very long, tree clocking becomes preferable to straight-line clocking
Keywords :
synchronisation; systolic arrays; clock distribution; failure probability; long systolic arrays; probabilistic models; reliability; signal processing; straight-line clocking; synchronization; synchronous systems; throughput; tree clocking; Array signal processing; Clocks; Computer science; Delay; Failure analysis; Pipelines; Synchronization; Systolic arrays; Throughput; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1991. ICASSP-91., 1991 International Conference on
Conference_Location :
Toronto, Ont.
ISSN :
1520-6149
Print_ISBN :
0-7803-0003-3
Type :
conf
DOI :
10.1109/ICASSP.1991.150588
Filename :
150588
Link To Document :
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