DocumentCode :
1957103
Title :
Automatically extracting structure from a logical design
Author :
Hirsch, M. ; Siewiorek, D.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie-Mellon Univ., Pittsburgh, PA, USA
fYear :
1988
fDate :
7-10 Nov. 1988
Firstpage :
456
Lastpage :
459
Abstract :
An algorithm for extracting structure from a logical design is presented. It uses a data structure which explicitly represents not only connectivity, but also a variety of information that is generated during logical design. The algorithm is applied to a small design and used to determine the layout. Work is in progress to increase the number of functional cluster types that can be extracted and to develop additional heuristics for automatically mapping the structure onto the chip.<>
Keywords :
circuit layout CAD; data structures; heuristic programming; integrated circuits; logic CAD; automatic structure mapping; chip; connectivity; data structure; floorplanning; functional cluster types; heuristics; layout; logical design; structure extraction algorithm; Algorithm design and analysis; Application software; Circuits; Data mining; Data structures; Design methodology; Job design; Logic design; Partitioning algorithms; Pins;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-0869-2
Type :
conf
DOI :
10.1109/ICCAD.1988.122548
Filename :
122548
Link To Document :
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