Title :
IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers [Front Cover and Table of Contents]
Abstract :
Presents the table of contents/splash page of the proceedings record.
Keywords :
binary decision diagrams; circuit CAD; circuit optimisation; field programmable gate arrays; high level synthesis; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; low-power electronics; nanotechnology; production testing; program compilers; reduced order systems; reliability; scheduling; timing; BDDs; FPGAs; analog macromodeling; analog synthesis; architecture oriented scheduling; combinational optimization; compiler techniques; dynamic verification; high-level synthesis; interconnect planning; manufacturing test; model order reduction; nanotechnology; physical synthesis; power analysis; power saving techniques; reliability optimization; sequential synthesis; signal integrity; substrate coupling; system-level exploration; timing;
Conference_Titel :
Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-7247-6
DOI :
10.1109/ICCAD.2001.968589
