Mapping recursive algorithms onto systolic architectures

A methodology is presented for designing systolic structures for recursive algorithms, especially for recursive filtering algorithms. A direct mapping methodology is used to map the dependence graph of the recursive algorithms onto systolic architectures. The mapping procedures are given and illustrated by examples. The methods for minimizing the computation time or the pipeline period and improving the utilization efficiency of the array are also discussed. In particular, the problems of the recursive state-space filtering algorithms are considered