DocumentCode
1957842
Title
Mobility-Enhanced MOS Device Technologies in Nano-CMOS era
Author
Takagi, Shinichi
Author_Institution
MIRAI-AIST, Kawasaki
fYear
2007
fDate
18-20 June 2007
Firstpage
5
Lastpage
8
Abstract
This paper reviews our recent results on these carrier-transport-enhanced CMOS structures on the Si platform for future high performance and low power LSIs.The improvement of carrier transport properties can be obtained through a variety of ways including the optimal choices of surface orientations, channel directions, strain configurations and channel materials are summarized.
Keywords
MOSFET; carrier mobility; effective mass; elemental semiconductors; nanoelectronics; semiconductor device models; silicon; Si; carrier-transport-enhanced CMOS structures; channel directions; channel materials; effective mass reduction; mobility-enhanced MOS device technologies; nanoCMOS; silicon platform; strain configurations; surface orientations; ultra-short channel MOSFET; CMOS technology; Capacitance; Capacitive sensors; Effective mass; Germanium silicon alloys; MOS devices; MOSFET circuits; Nanoscale devices; Silicon germanium; Tensile strain;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference, 2007 65th Annual
Conference_Location
Notre Dame, IN
ISSN
1548-3770
Print_ISBN
978-1-4244-1101-6
Electronic_ISBN
1548-3770
Type
conf
DOI
10.1109/DRC.2007.4373625
Filename
4373625
Link To Document