Multi-CPU/FPGA Platform Based Heterogeneous Multiprocessor Prototyping: New Challenges for Embedded Software Designers

Heterogeneous multiprocessor systems on-chip (MPSoC) are considered to be the next generation of multiprocessor architectures able to deal with the ever increasing performances and scalability demands. In fact, combining heterogeneous processors in the same architecture allows drawing on strength from each kind of processor, increasing overall system performance and efficiency. However, such a design introduces new challenges, especially for embedded software designers. Multi-CPU/FPGA platform based prototyping approach is an attractive solution for fast validation of MPSoC´s embedded software. We address in this paper, the difficulty of ensuring an efficient bridging between processors in heterogeneous MPSoC. We propose a common FPGA based middleware structure to manage communication and synchronisation between the processors. Then, we describe a semi-systematic design space exploration framework for automatic inter- processor communication and synchronization refinement.