DocumentCode :
1957987
Title :
Analytical modeling and comparison of Triple gate MOSFET with Double gate MOSFET
Author :
Pandey, Satya Prakash ; Kushwah, Rajendra Singh ; Singh, S.B. ; Akashe, Shyam
Author_Institution :
Electron. & Commun. Eng. Dept., ITM Univ., Gwalior, India
fYear :
2013
fDate :
3-4 Aug. 2013
Firstpage :
1
Lastpage :
6
Abstract :
In this paper, we bring in the incomparable features of modification in symmetrical Triple-gate (TG) MOSFET. The modified structure of Triple gate (TG) MOSFET reduces short-channel effects (SCEs) in comparison of the Double-gate (DG) MOSFET model. The threshold voltage, the drain-induced barrier lowering (DIBL) and surface potential are calculated. We will also discuss a model for the trans-conductance, drain current and drain conductance. The proposed Triple-gate (TG) structure province increase in the trans-conductance and drain current and reduces the short-channel effects (SCEs), electric field and drain conductance and in comparison of the Double-gate (DG) MOSFET.
Keywords :
MOSFET; semiconductor device models; surface potential; analytical modeling; double gate MOSFET; drain conductance; drain current; drain-induced barrier lowering; electric field; short-channel effects; surface potential; threshold voltage; transconductance; triple gate MOSFET; Electric fields; Electric potential; Logic gates; MOSFET; Mathematical model; Semiconductor device modeling; Threshold voltage; Conductance; Double gate; Drain-induced barrier lowering (DIBL); Trans-conductance; Triple gate; Voltage gain;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Control Computing Communication & Materials (ICCCCM), 2013 International Conference on
Conference_Location :
Allahabad
Print_ISBN :
978-1-4799-1374-9
Type :
conf
DOI :
10.1109/ICCCCM.2013.6648901
Filename :
6648901
Link To Document :
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