DocumentCode
1958125
Title
Design and analysis of FINFET pass transistor based XOR and XNOR circuits at 45 nm technology
Author
Yadav, Nakul ; Khandelwal, Sourabh ; Akashe, Shyam
Author_Institution
ITM Univ., Gwalior, India
fYear
2013
fDate
3-4 Aug. 2013
Firstpage
1
Lastpage
5
Abstract
The conventional single-gate MOSFETs faces great challenges in scaling down of devices due to the severe short-channel effects that reason an exponential gain in the leakage current. To minimize the short channel effect Double-gate FinFET can be used in place of conventional MOSFET circuits because of the self-alignment of the two gates. Design of XOR and XNOR circuits is suggested to improve the speed and power of these circuits and is basic building block of many arithmetic circuits. This paper compares and evaluates the performance of various designs of pass transistor based XOR and XNOR circuits. This paper demonstrates comparative performance study of high speed, low power and low voltage on XOR and XNOR digital circuit. The performances of XOR and XNOR circuits are based on CADANCE VIRTUOSO tool at 45 nm by applying voltage supply 0.7 voltages and the temperate is 27°C. Simulation results reveal low power, delay, power, delay product (PDP), average dynamic power consumption, energy delay product (EDP).
Keywords
MOSFET; NOR circuits; low-power electronics; network synthesis; CADANCE VIRTUOSO tool; XNOR circuits; XOR circuits; arithmetic circuits; digital circuit; finFET pass transistor; self-alignment; size 45 nm; temperature 27 degC; voltage 0.7 V; CMOS integrated circuits; Delays; FinFETs; Logic gates; Power demand; EDP; PDP; XNOR; XOR; high speed; low power; pass transistor;
fLanguage
English
Publisher
ieee
Conference_Titel
Control Computing Communication & Materials (ICCCCM), 2013 International Conference on
Conference_Location
Allahabad
Print_ISBN
978-1-4799-1374-9
Type
conf
DOI
10.1109/ICCCCM.2013.6648909
Filename
6648909
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