DocumentCode :
1958139
Title :
Silicon Nanowire Field Effect Devices By Top-Down CMOS Technology
Author :
Balasubramanian, N. ; Singh, N. ; Rustagi, S.C. ; Kavitha ; Agarwal, Ajay ; Zhiqiang, Gao ; Lo, G.Q. ; Kwong, D.L.
Author_Institution :
Inst. of Microelectron., Singapore
fYear :
2007
fDate :
18-20 June 2007
Firstpage :
47
Lastpage :
48
Abstract :
There has been tremendous advancement in the development of novel nano-technologies for future CMOS nanoelectronics. The challenges and opportunities have been widely discussed with the focus on the choice of materials, processes of implementation and innovative non-classical device architectures to continuously meet the scaling requirements. Among the non-classical device architectures, Gate All Around (GAA) FET with nanowire (NW) channel body offers the ultimate electro-static control and thus has the potential to push the gate length to few nanometers. The key challenge for NWs to be widely adopted in semiconductor industry is that they have to be formed by large scale manufacturing methods. Especially, for CMOS applications, the methods should not lead to contamination issues.
Keywords :
CMOS integrated circuits; elemental semiconductors; field effect devices; nanowires; silicon; Si; future CMOS nanoelectronics; gate all around FET; gate length; large scale manufacturing methods; nanotechnologies; nanowire channel body; nonclassical device architectures; semiconductor industry; silicon nanowire field effect devices; top-down CMOS technology; ultimate electro-static control; CMOS technology; Dielectrics; Etching; FETs; Fabrication; Inverters; Nanoelectronics; Nanoscale devices; Silicon; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference, 2007 65th Annual
Conference_Location :
Notre Dame, IN
ISSN :
1548-3770
Print_ISBN :
978-1-4244-1101-6
Electronic_ISBN :
1548-3770
Type :
conf
DOI :
10.1109/DRC.2007.4373645
Filename :
4373645
Link To Document :
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