• DocumentCode
    1958218
  • Title

    High - Mobility, Low Parasitic Resistance Si/Ge/Si Heterostructure Channel Schottky Source/Drain PMOSFETs

  • Author

    Pethe, Abhijit ; Saraswat, Krishna

  • Author_Institution
    Stanford Univ., Stanford
  • fYear
    2007
  • fDate
    18-20 June 2007
  • Firstpage
    55
  • Lastpage
    56
  • Abstract
    We have built high performance PMOSFETs on Si substrates using a Si/Ge/Si heterostructure channel and NiSi source/drain regions. These devices exhibit ~2X improvement in mobility and orders of magnitude increase in the drive current without adversely affecting the OFF state leakage. In conclusion, using a thin Ge layer within the inversion region of a Schottky Si - PMOSFET provides for higher hole mobility (~2X) and much higher drive currents due to almost zero barrier height to holes in the channel. Also the OFF state leakage is maintained at a low value because it is limited by the large barrier height in the wider bandgap Si and Ge quantization. The transistor hence, combines the advantages of high mobility, and low parasitic resistance and is an attractive candidate for scaling PMOSFETs into the sub-20nm regime.
  • Keywords
    MOSFET; Schottky gate field effect transistors; characteristics measurement; germanium compounds; high electron mobility transistors; hole mobility; semiconductor device measurement; silicon compounds; MOSFET scaling; NiSi; OFF state leakage; Schottky source-drain PMOSFET; Si; Si-Ge-Si; drive current; heterostructure channel; hole mobility; parasitic resistance; Dielectrics; Electric resistance; Electrodes; Electrons; Insulation; MOSFETs; Photonic band gap; Schottky diodes; Substrates; Temperature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference, 2007 65th Annual
  • Conference_Location
    Notre Dame, IN
  • ISSN
    1548-3770
  • Print_ISBN
    978-1-4244-1101-6
  • Electronic_ISBN
    1548-3770
  • Type

    conf

  • DOI
    10.1109/DRC.2007.4373649
  • Filename
    4373649