DocumentCode
1958226
Title
Input assignment algorithm for decoded-PLAs with multi-input decoders
Author
Kuang-Chien Chen ; Muroga, S.
Author_Institution
Dept. of Comput. Sci., Illinois Univ., Urbana, IL, USA
fYear
1988
fDate
7-10 Nov. 1988
Firstpage
474
Lastpage
477
Abstract
A heuristic algorithm for assigning input variables to the decoders of a decoded-programmable logic array (PLA) is presented. In this algorithm, the number of inputs to each decoder is not restricted to two and the area overhead incurred by using multi-input decoders is considered in the cost function. Experimental results show that the areas of multi-input decoded-PLAs designed by this algorithm are smaller in many cases than those of decoded-PLAs with two-input decoders or standard PLAs.<>
Keywords
VLSI; logic CAD; logic arrays; area overhead; cost function; decoded-programmable logic array; heuristic algorithm; multi-input decoded-PLAs; multi-input decoders; Algorithm design and analysis; Computer science; Cost function; Decoding; Dynamic programming; Heuristic algorithms; Input variables; Logic design; Programmable logic arrays; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on
Conference_Location
Santa Clara, CA, USA
Print_ISBN
0-8186-0869-2
Type
conf
DOI
10.1109/ICCAD.1988.122552
Filename
122552
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