DocumentCode
1958517
Title
Body Thickness Optimization and Sensitivity Analysis for High Performance FinFETs
Author
Lekshmanan, Dheepa ; Bansal, Aditya ; Roy, Kaushik
Author_Institution
Purdue Univ., West Lafayette
fYear
2007
fDate
18-20 June 2007
Firstpage
91
Lastpage
92
Abstract
This article proposes a device optimization technique to achieve high performance in double-gate MOSFETs by considering the trade-off between on-current and gate capacitance with silicon thickness. It shows that the optimal silicon thickness varies based on the mode of operation (super-threshold or sub-threshold). Even though these devices have intrinsic body thickness variations, the effect of these variations reduces considerably as the number of fins increases.
Keywords
MOSFET; capacitance; optimisation; sensitivity analysis; silicon; FinFET; double-gate MOSFET; on-current gate capacitance; sensitivity analysis; silicon body thickness optimization; Capacitance; Capacitance-voltage characteristics; Circuits; Delay; Fabrication; FinFETs; MOSFETs; Potential well; Sensitivity analysis; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference, 2007 65th Annual
Conference_Location
Notre Dame, IN
ISSN
1548-3770
Print_ISBN
978-1-4244-1101-6
Electronic_ISBN
1548-3770
Type
conf
DOI
10.1109/DRC.2007.4373664
Filename
4373664
Link To Document