DocumentCode
1959232
Title
Novel architecture for a high performance full custom graphics processor
Author
Asal, M.D. ; Keay, J.D. ; Fellows, A.M. ; Robertson, I.C. ; Ing-Simmons, N.K. ; Sherlock, I.J.
Author_Institution
Texas Instrum., Bedford, UK
fYear
1989
fDate
2-4 Oct 1989
Firstpage
410
Lastpage
414
Abstract
The design and architectural features of a 32-b microprogrammed graphics processor are discussed. A description is given of the application of datapath elements and the exploitation of VRAM hardware, to achieve state-of-the-art processor performance levels. The host interface is discussed, along with video control, screen refresh control, and emulation and testability
Keywords
computer architecture; computer graphic equipment; microprocessor chips; 32 bit; VRAM hardware; architecture; datapath elements; emulation; full custom graphics processor; host interface; microprogrammed graphics processor; processor performance levels; screen refresh control; testability; video control; Application software; Bandwidth; Communication system control; Computer architecture; Computer displays; Computer graphics; Control systems; Instruments; Logic design; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1989. ICCD '89. Proceedings., 1989 IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-1971-6
Type
conf
DOI
10.1109/ICCD.1989.63398
Filename
63398
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