DocumentCode :
1959995
Title :
On the signal bounding problem in timing analysis
Author :
Jin-Fuw Lee ; Ostapko, D.L. ; Soreff, J. ; Wong, C.K.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear :
2001
fDate :
4-8 Nov. 2001
Firstpage :
507
Lastpage :
514
Abstract :
In this paper, we study the propagation of slew dependent bounding signals and the corresponding slew problem in static timing analysis. The selection of slew from the latest arriving signal, a commonly used strategy, may violate the rule of monotonic delay. Several methods for generating bounding signals to overcome this difficulty are described. The accuracy and monotonicity of each method is analyzed. These methods can be easily implemented in a static timer to improve the accuracy.
Keywords :
circuit CAD; circuit analysis computing; integrated circuit design; timing; bounding signals; chip design; latest arriving signal; monotonic delay rule; monotonicity; signal bounding problem; slew dependent bounding signal propagation; slew problem; slew selection; static timer; static timing analysis; timing accuracy; timing analysis; Chip scale packaging; Circuit optimization; Circuit simulation; Computer science; Delay lines; Propagation delay; Signal analysis; Signal generators; Switches; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
ISSN :
1092-3152
Print_ISBN :
0-7803-7247-6
Type :
conf
DOI :
10.1109/ICCAD.2001.968693
Filename :
968693
Link To Document :
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