An ASIC DSP engine compiler: philosophy and applications

An ASIC DSP compiler has been developed to provide fixed-function, high-throughput machines of the type commonly encountered in DSP applications. Such applications include image processing and high-bandwidth communications. It is assumed that the problem can be partitioned into a series of passes through a fixed-function integer arithmetic processing core. Designs are synthesized by the compiler from a dataflow specification plus parameters to specify the desired computational throughput and accuracy. The user can override synthesized attributes and use interactive size and power estimators to make tradeoffs between numerical accuracy and size or power consumption. The approach is illustrated with an example of a 256-point 20 MHz complex FFT (fast Fourier transform)